Categories

Compiling Algorithms for Heterogeneous Systems

  • Computer Architecture
  • Categories:Computers & Internet
  • Language:English(Translation Services Available)
  • Publication date:January,2018
  • Pages:106
  • Retail Price:(Unknown)
  • Size:190mm×234mm
  • Page Views:314
  • Words:(Unknown)
  • Star Ratings:
  • Text Color:Black and white
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Description

Most emerging applications in imaging and machine learning must perform immense amounts of computation while holding to strict limits on energy and power. To meet these goals, architects are building increasingly specialized compute engines tailored for these specific tasks. The resulting computer systems are heterogeneous, containing multiple processing cores with wildly different execution models. Unfortunately, the cost of producing this specialized hardware (and the software to control it) is astronomical. Moreover, the task of porting algorithms to these heterogeneous machines typically requires that the algorithm be partitioned across the machine and rewritten for each specific architecture, which is time consuming and prone to error.

Over the last several years, the authors have approached this problem using domain-specific languages (DSLs): high-level programming languages customized for specific domains, such as database manipulation, machine learning, or image processing. By giving up generality, these languages are able to provide high-level abstractions to the developer while producing high-performance output. The purpose of this book is to spur the adoption and the creation of domain-specific languages, especially for the task of creating hardware designs.

In the first chapter, a short historical journey explains the forces driving computer architecture today. Chapter 2 describes the various methods for producing designs for accelerators, outlining the push for more abstraction and the tools that enable designers to work at a higher conceptual level. From there, Chapter 3 provides a brief introduction to image processing algorithms and hardware design patterns for implementing them. Chapters 4 and 5 describe and compare Darkroom and Halide, two domain-specific languages created for image processing that produce high-performance designs for both FPGAs and CPUs from the same source code, enabling rapid design cycles and quick porting of algorithms. The final section describes how the DSL approach also simplifies the problem of interfacing between application code and the accelerator by generating the driver stack in addition to the accelerator configuration.

This book should serve as a useful introduction to domain-specialized computing for computer architecture students and as a primer on domain-specific languages and image processing hardware for those with more experience in the field.

Author

Steven Bell, Stanford University
Steven Bell is a Ph.D. candidate at Stanford University, where he's building camera platforms as a vehicle to explore the challenge of rapidly creating high-performance hardware/software systems. As part of his Ph.D. work, he has developed imaging algorithms, written kernel drivers, and wrangled FPGA tools. His interests include image processing and computational photography, embedded software and systems, and teaching these topics to others. He received a B.S. in computer engineering from Oklahoma Christian University in 2011.

Jing Pu, Google
Jing Pu received a B.S. in microelectronics from Peking University and an M.S. and Ph.D. in electrical engineering from Stanford University. He is currently working on Pixel Visual Core and Halide at Google. During his Ph.D., he worked on programming CPU/FPGA heterogeneous systems from the Halide image processing language. His research interests include domain-specific architectures and compilers, computer vision, and deep learning.

Contents

Table of Contents
Preface
Acknowledgments
Introduction
Computations and Compilers
Image Processing with Stencil Pipelines
Darkroom: A Stencil Language for Image Processing
Programming CPU/FPGA Systems from Halide
Interfacing with Specialized Hardware
Conclusions and Future Directions
Bibliography
Authors' Biographies

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