Principles of Secure Processor Architecture Design
- Computers
- Categories:Computers & Internet
- Language:English(Translation Services Available)
- Publication date:October,2018
- Pages:173
- Retail Price:(Unknown)
- Size:190mm×234mm
- Page Views:300
- Words:(Unknown)
- Star Ratings:
- Text Color:(Unknown)
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Description
This book presents the different challenges of secure processor architecture design to graduate students interested in research on architecture and hardware security and computer architects working in industry interested in adding security features to their designs. It educates readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, it presents numerous design suggestions, as well as discussing pitfalls and fallacies that designers should avoid.
Author
Jakub Szefer's research interests are at the intersection of computer architecture and hardware security. Jakub's recent projects focus on security verification of processor architectures; hardware (FPGA) implementation of cryptographic algorithms, especially post-quantum cryptographic (PQC) algorithms; Cloud FPGA security; designs of new Physically Unclonable Functions (PUFs); and leveraging physical properties of computer hardware for new cryptographic and security applications. Jakub's research is currently supported through National Science Foundation and industry donations. Jakub is a recipient of a 2017 NSF CAREER award. In the summer of 2013, he became an Assistant Professor of Electrical Engineering at Yale University, where he started the Computer Architecture and Security Laboratory (CAS Lab). Prior to joining Yale, he received Ph.D. and M.A. degrees in Electrical Engineering from Princeton University, where he worked with his advisor, Prof. Ruby B. Lee, on secure processor architectures. He received a B.S. with highest honors in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign.
Contents
Introduction
Basic Computer Security Concepts
Secure Processor Architectures
Trusted Execution Environments
Hardware Root of Trust
Memory Protections
Multiprocessor and Many-Core Protections
Side-Channel Threats and Protections
Security Verification of Processor Architectures
Principles of Secure Processor Architecture Design
Bibliography
Online Resources
Author's Biography